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Wissenschaftliche Vorträge

Operating System Support for Redundant Multithreading

Verteidigung im Promotionsverfahren von Dipl.-Inf. Björn Döbel (Institut für Systemarchitektur, Lehrstuhl Betriebssysteme)

25.11.2014, 13:30 Uhr, INF 1004

Failing hardware is a fact and trends in microprocessor design indicate that the fraction of hardware suffering from permanent and transient faults will continue to increase in future chip generations. Researchers proposed various solutions to this issue with different downsides: Specialized hardware components make hardware more expensive in production and consume additional energy at runtime. Fault-tolerant algorithms and libraries enforce specific programming models on the developer. Compiler-based fault tolerance requires the source code for all applications to be available for recompilation. In this thesis I present ASTEROID, an operating system architecture that integrates applications with different reliability needs. ASTEROID is built on top of the L4/Fiasco.OC microkernel and extends the system with Romain, an operating system service that transparently replicates user applications. Romain supports single- and multi-threaded applications without requiring access to the application's source code. Romain replicates applications and their resources completely and thereby does not rely on hardware extensions, such as ECC-protected memory. In my thesis I describe how to efficiently implement replication as a form of redundant multithreading in software. I develop mechanisms to manage replica resources and to make multi-threaded programs behave deterministically for replication. I furthermore present an approach to handle applications that use shared-memory channels with other programs. My evaluation shows that Romain provides 100% error detection and more than 99.6% error correction for single-bit flips in memory and general-purpose registers. At the same time, Romain's execution time overhead is below 14% for single-threaded applications running in triple-modular redundant mode. The last part of my thesis acknowledges that software-implemented fault tolerance methods often rely on the correct functioning of a certain set of hardware and software components, the Reliable Computing Base (RCB). I introduce the concept of the RCB and discuss what constitutes the RCB of the ASTEROID system and other fault tolerance mechanisms. Thereafter I show three case studies that evaluate approaches to protecting RCB components and thereby aim to achieve a software stack that is fully protected against hardware errors.

Towards Next Generation Sequential and Parallel SAT Solvers

Verteidigung im Promotionsverfahren von Dipl.-Inf. Norbert Manthey (Institut für Künstliche Intelligenz, Professur Knowledge Representation and Reasoning)

1.12.2014, 13:00 Uhr, INF 1004 (Ratssaal)

This thesis focuses on improving the SAT solving technology. The improvements focus on two major subjects: sequential SAT solving and parallel SAT solving. To better understand sequential algorithms, the abstract reduction system Generic CDCL is introduced. With Generic CDCL, the soundness of solving techniques can be modeled. Next, the conflict driven clause learning algorithm is extended with the three techniques local look-ahead, local probing and all UIP learning that allow more global reasoning during search. These techniques improve the performance of the sequential SAT solver Riss. Then, the formula simplification techniques bounded variable addition, covered literal elimination and an advanced cardinality constraint extraction are introduced. By using these techniques, the reasoning of the overall SAT solving tool chain becomes stronger than plain resolution. When using these three techniques in the formula simplification tool Coprocessor before using Riss to solve a formula, the performance can be improved further. Due to the increasing number of cores in CPUs, the scalable parallel SAT solving approach iterative partitioning has been implemented in Pcasso for the multi-core architecture. Related work on parallel SAT solving has been studied to extract main ideas that can improve Pcasso. Besides parallel formula simplification with bounded variable elimination, the major extension is the extended clause sharing level based clause tagging, which builds the basis for conflict driven node killing. The latter allows to better identify unsatisfiable search space partitions. Another improvement is to combine scattering and look-ahead as a superior search space partitioning function. In combination with Coprocessor, the introduced extensions increase the performance of the parallel solver Pcasso. The implemented system turns out to be scalable for the multi-core architecture. Hence iterative partitioning is interesting for future parallel SAT solvers. The implemented solvers participated in international SAT competitions. In 2013 and 2014 Pcasso showed a good performance. Riss in combination with Coprocessor won several first, second and third prices, including two Kurt-Gödel-Medals. Hence, the introduced algorithms improved modern SAT solving technology.

Die digitale Zeitung - Konzepte zur gebrauchstauglichen Gestaltung von digitalen Nachrichteninterfaces

Präsentation der Diplomarbeit (alle Studiengänge) von Thomas Schmalenberger (Institut für Software und Multimediatechnik; Professur für Mediengestaltung)

2.12.2014, 10:00 Uhr, INF 2101 Beratungsraum 2. Etage

Die Zeitungslandschaft befindet sich im Umbruch. Klassische Tageszeitungen verlieren seit Jahren an Auflage und Reichweite, während sinnvolle Konzepte zur Bekämpfung dieser Entwicklungen bislang fehlen. Die Verlage wirken rückläufigen Umsätzen mit Konzentrationsprozessen und Kosteneinsparungen entgegen. Zudem existieren kaum innovative Ansätze zur Transformation der gedruckten Zeitung in digitale Modelle. Redaktionelle Inhalte werden fast ausnahmslos in möglichst zeitungsähnlicher Weise als webbasiertes Angebot oder in Form von mobilen Apps präsentiert. Die Inhalte werden dabei meist unverändert wiederverwendet, eine Adaption an das digitale Medium oder gar den Leser findet nicht statt. Daraus ergibt sich die Grundthese der vorliegenden Arbeit: Den Lesern digitaler Nachrichtenplattformen fehlen geeignete Instrumente zur Navigation im Datenraum und zur Filterung der redaktionellen Inhalte.

Auf einem interdisziplinären Fundament wurden daher grundlegende Forderungen an die Funktion, die Struktur und die Gestaltung digitaler Zeitungen formuliert und in einem Prototypen zur abschließenden Evaluation umgesetzt. Das Ziel bestand dabei in der Transformation des Wesens der traditionellen Zeitung zu einem interaktiven Explorationswerkzeug, das sich dem Leser abhängig seiner Bedürfnisse und Gewohnheiten anpasst und ihm so einen mehrdimensionalen Zugang zur Datenbasis der redaktionellen Inhalte gewährt. Die Forderungen wurden losgelöst von technischen Rahmenbedingungen aufgestellt und beziehen sich auf jede Form der digitalen Veröffentlichung von tagesaktuellen Nachrichten.

Enhancements of the massively parallel memory allocator ScatterAlloc and its adaption to the general interface mallocMC

Präsentation der Studienarbeit (Großer Beleg) (alle Studiengänge) von Carlchristian Eckert (Institut für Technische Informatik, Professur Rechnerarchitektur)

2.12.2014, 13:00 Uhr, APB 1096

This work presents mallocMC, a general interface for memory allocation on accelerator devices. The policy based design of mallocMC enables a modular replacement of functional components as well as
configuration of the allocator at compile time. To provide a real world example for CUDA-capable accelerators, the existing high-performance memory allocator ScatterAlloc was adapted to mallocMC.
This adaption was enhanced with additional features and bugfixes and is expected to replace the current memory allocator in the massively parallel particle simulation PIConGPU.

Diese Veranstaltung wird unterstützt von Professur für Rechnerarchitektur.

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Stand: 23.11.2014, 12:16 Uhr
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