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Network Management in Wireless Cyber-Physical Systems

Presentation of the Master thesis (alle Studiengänge) by Prateek Gautam (Center for Advancing Electronics Dresden)

26th Feb 2020, 9.00 AM, BAR III81/82 (Meetingraum 3. Etage)

Low-power wireless networks allow for easy deployment and low maintenance for Cyber-Physical Systems (CPS). Mixer, a promising communication primitive to build such a low-power wireless network, is a fast and highly reliable flooding protocol which supports the spectrum from one-to-all to all-to-all traffic. Currently, the network is configured statically in Mixer, which hinders its potential to work in a real world deployment environment where network dynamics are inevitable.
The thesis presents a network management layer on top of Mixer. It removes the need for static configuration of the network and its members by
allowing nodes to join and leave the network dynamically. It also manages the communication needs of the nodes in the network. This work is extended to answer problems like leader failure and resource allocation locally, with only few assumptions.
This thesis presents the design and features of the network management in detail, while also serving as a user manual. The evaluation of this work
demonstrates the reliability in terms of adaptive nature and fault tolerance of the protocol. The performance is also evaluated to show low performance overhead and scalability. It is fully supported on the TelosB platform, provides simple, well-defined API for potential applications.
This thesis concludes by illustrating potential improvements to the existing work and outlining directions for future research.

This event is sponsored by Networked Embedded Systems Lab.


Design and Programming Methods for Reconfigurable MPSoCs using a NoC-centric Approach

Scientific talk being part of the PhD defence (alle Studiengänge) by M. Sc. Jens Rettkowski

27th Feb 2020, 2.00 PM, APB 1004

Nowadays, the growing complexity in a wide variety of applications has led to the use of Multiprocessor Systems-on-Chip (MPSoCs). Networks-on-Chip (NoCs) have emerged as a scalable on-chip communication technology for a high number of processing elements (PEs). Nevertheless, this high number results in tremendous communication costs tending to become the performance bottleneck. This work outlines state-of-the-art MPSoCs and NoCs showing in addition to the advances, also the challenges in the domain of parallel programming. On the basis of these challenges, novel design and programming methods for MPSoCs and NoCs implemented on Field-Programmable-Gate-Arrays are presented. A Kahn-Process-Network – based model (KPN-based model) is used to describe a parallel application which can be simply mapped to homogeneous MPSoCs using a light-weight Message-Passing-Interface. The holistic development of MPSoCs that benefit from application-specific accelerators is made more productive using a methodology and corresponding toolflow. Furthermore, routers that are used in NoCs are optimized by exchanging internal buffers with processing units. They provide additional computing resources to process data while it is transferred between PEs. The main objective of this router model is the efficient utilization of the communication time by performing data preprocessing or providing Quality-of-Services such as security or reliability services. The KPN-based model has been modified to support not only the mapping of tasks to PEs but also the mapping to processing units inside routers. Moreover, this concept that enables data preprocessing inside NoCs has been evaluated within a project that aims to help visually impaired people. In this project, a system has been developed that scans the environment using a Lidar and transforms it into an intuitively usable sound helping people to orient in unknown environments.



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Last modified: 23rd Feb 2020, 4.07 PM
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Events
26 Feb 2020
9.00 AM, BAR III81/82 (Meetingraum 3. Etage)
Presentation of the Master thesis by Prateek Gautam